$16.3 Million Funding Boost for Ultra-Efficient AI Hardware Projects at NW-AI-Hub
California, USA—In a significant stride towards advancing the energy efficiency of artificial intelligence (AI) hardware, three innovative projects within the California-Pacific-Northwest AI Hardware Hub (NW-AI-Hub) have received a $16.3 million injection from the Department of Defense. This funding is part of the broader $269 million Microelectronics Commons project awards, aimed at bolstering the United States' semiconductor industry under the CHIPS and Science Act.
The NW-AI-Hub, co-led by Stanford University and the University of California (UC), Berkeley, is one of eight hubs funded in 2023 through the Microelectronics Commons programme. This programme's primary aim is to enhance the nation's semiconductor manufacturing capabilities, thereby reducing reliance on foreign sources of microelectronics.
"Energy efficiency of AI hardware is of paramount importance because the energy consumption of AI is a key bottleneck for its ubiquitous deployment in society," stated H.-S. Philip Wong, chairman of the hub’s executive committee and professor of electrical engineering at Stanford University. He added, "The California and Pacific Northwest region is delighted to have the opportunity to contribute to lab-to-fab translation of advanced AI hardware technologies that are essential to ensure the national security and economic development of this country."
This substantial federal award will support the initial year of pioneering research aimed at transforming AI hardware. Tsu-Jae King Liu, dean of UC Berkeley’s College of Engineering and executive committee co-chair of the NW-AI-Hub, emphasised the importance of this investment. "Our hub brings together dozens of academic institutions, National Labs and industry partners to develop innovations with impact throughout the entire semiconductor value chain," said Liu. "This includes materials, devices, electronic design automation and chip design, and packaging, as well as system prototyping and testing."
The projects receiving funding are:
CMOS+X: Integrated Ferroelectric Technologies for Ultra-Efficient AI Hardware Led by Sayeef Salahuddin, a professor of electrical engineering and computer sciences at UC Berkeley, this project aims to significantly enhance the energy efficiency of future AI hardware by leveraging the unique properties of ferroelectric materials. The research focuses on lowering the power supply voltage of computing hardware and integrating non-volatile memory directly with the microprocessor.
Energy-Efficient and Scalable AI Hardware Systems through Heterogeneous Integration of Specialized Chiplets Spearheaded by Subhasish Mitra, a professor of electrical engineering and computer science at Stanford University, this project will harness innovations in semiconductor materials, integration technologies, and AI system architecture to drastically improve the energy consumption and performance of AI hardware.
Energy-Efficient and Scalable, and Self-learning AI Hardware with 3D Electronic-Photonic-Integrated-Circuits Led by S.J. Ben Yoo, a professor of electrical and computer engineering at UC Davis, this endeavour aims to develop commercially viable optoelectronic AI computing prototypes. These prototypes will address large-scale AI challenges at the chip level by combining advancements in photonics and electronics into a compact 3D circuit module.
These projects include the collaboration of more than 20 partners from academia, industry, and government laboratories, underlining the comprehensive and collaborative nature of the NW-AI-Hub’s mission. The outcomes of these projects are anticipated to play a critical role in propelling the United States forward in AI hardware innovation and energy efficiency, contributing to the nation's broader technological and economic objectives.
Source: Noah Wire Services